Monitor Description

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The main CPU and sub CPU of the ECM perform data communication between each other. The main CPU monitors the communication and WDC pulses from the sub CPU. When the signal malfunctions below are detected, this DTC is stored.

DTC No.	Detection Item	DTC Detection Condition	Trouble Area	MIL	Memory
P060A	Internal Control Module Monitoring Processor Performance	A CPU reset is performed after one of the following conditions is met (1 trip detection logic): There is an ECM main CPU error. There is an ECM sub CPU error. There is an electronic throttle monitoring CPU error.	ECM	Comes on	DTC stored