PSM Logic Functions, Flip-Flop Block Function - GF54.21-S-3211TRA

Model 447

With Code ED5 (Parameterisable special module)

Except Code XM7 (MOPF II)

Model 448

With Code ED5 (Parameterisable special module)

Except Code XM7 (MOPF II)

Courtesy of MERCEDES-BENZ USA

Flip-flop block function

The flip-flop block has an analog input 1 (E₁ ) (16 bit) for set (S) or data (D) and a digital (binary) input 2 (E₂ ) for reset (R) or clock (C).

The flip-flop block has an analog output (A_A ) (16 bit) and a digital (binary) output (A_B ).

Output (A_B ) represents the logical inversion of output (A_A ).

Coding of flip-flop block

The flip-flop block can be configured either as a "D flip-flop" with data and clock input, or as an "RS flip-flop" with set and reset input.

When configured as a "D flip-flop", it is possible to save 16-bit signals at the data input and to output them at output (A_A ).

Signal identification number = Signal ID.

CODING VIA DATA ENTRY TABLE

Designation in data entry table	Data entry bit width	Data bit evaluation	Meaning
B1_G1_FF1_Type	1 bit	-	Set value: "0" = "RS flip-flop" "1" = "D flip-flop"
B1_G1_FF1_Evaluation	1 bit	-	Set value with "RS flip-flop": "0" = State-triggered "1" = Edge-triggered Set value with "D flip-flop": "0" = Positive edge evaluation "1" = Negative edge evaluation
B1_G1_FF1_1_Signal_ID	32 bit	1 bit: "RS flip-flop" 16 bit: "D flip-flop"	Filter + reference ID of set(S) or data (D) input signal
B1_G1_FF1_2_Signal_ID	32 bit	1 bit	Filter + reference ID of reset(R) or clock (C) input signal

SIGNAL ID OF OUTPUTS

Designation in signal ID list	Data bit width	Meaning
Out_G1_FF1	16 bit	Signal ID of output (A_A )
Out_G1_FF1_inv	1 bit	Signal ID of output (A_B ) (corresponds to logically inverted output (A_A ))

The same applies for the other flip-flop blocks with the naming convention:

	Parameterizable special module (PSM) control unit component description		GF54.21-S-5005TRA
	Overview of system components for parameterizable special module (PSM)		GF54.21-S-9998TRA