DTC Description
This DTC appears when the EEPROM data read by the master processor is different from the previous data, or when the processor detects abnormal operation in RAM, status register, interrupt, timer, A/D converter or cycle time.
This DTC appears when the EEPROM data read by the master processor is different from the previous data, or when the processor detects abnormal operation in RAM, status register, interrupt, timer, A/D converter or cycle time.